Objective
System Verilog combines HDLs and a hardware verification language. It takes an object-oriented programming approach. It also teaches how to code in system Verilog language-which is the most popular Hardware description language used for SoC design and verification in semiconductor industry. |
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| Course Curriculum |
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Pre-defined and User defined data types |
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Array types (Static, dynamic, associative) |
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OOPs programming concepts (Eg: Class, Inheritance) |
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Constrained random stimulus generation |
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Casting (Static & dynamic) |
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SV Schedulers |
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Inter Process communication (Semaphore, mailbox) |
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Coverage Analysis (Code, Functional, FSM) |
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Interfaces and clocking block |
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Test bench creation using system Verilog concepts |
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